[ltt-dev] UST: PowerPC 32 port of now in git

[Mathieu Desnoyers]

* Josh Boyer (jwboyer at gmail.com) wrote:
> On Tue, Apr 20, 2010 at 02:45:36PM -0400, Pierre-Marc Fournier wrote:
> > Mathieu Desnoyers wrote:
> >> * Pierre-Marc Fournier (pierre-marc.fournier at polymtl.ca) wrote:
> >>> Hi,
> >>>
> >>> This is to let you know that the UST in the git repository now 
> >>> supports  the PowerPC 32 architecture.
> >>>
> >>> http://git.dorsal.polymtl.ca/?p=ust.git;a=summary
> >>>
> >>> Testing is welcome.
> >>>
> >>> This will be in the next release.
> >>
> >> This port seems to rely on do_gettimeofday. Any plan to add ppc tb
> >> register-based trace clock ?
> >>
> >
> > Hi Mathieu,
> >
> > I did some tests. On my ppc32 system, this counter wraps in about 2  
> > minutes. Will LTTV tolerate well a wrapping time base?
> 
> ppc32 timebase is two separate registers, timebase upper and lower.  I could
> certainly see the lower register (lower 32 bits) wrapping in about 2 min, but
> the upper should continue on.

Yep. This is why I would like to have a look at the implementation. It
should like this for ppc32:

static inline u64 trace_clock_read64(void)
{
  u32 tbl, tbh[2];

  tbh[0] = read_tbh();
  do {
    tbh[1] = tbh[0];
    tbl = read_tbl();
    tbh[0] = read_tbh();
  } while(tbh[0] != tbh[1])
  return (((u64)tbh[0]) << 32) | tbl;
}

You should make sure that the read_tbl/read_tbh inline asm are declared
volatile so the compiler does not reorder them.

Thanks,

Mathieu

> 
> josh
> 

-- 
Mathieu Desnoyers
Operating System Efficiency R&D Consultant
EfficiOS Inc.
http://www.efficios.com