[lttng-dev] [PATCH] Fix: revise urcu_read_lock_update() comment

[Mathieu Desnoyers]

On 6/13/23 21:51, Li-Kuan Ou wrote:
> Read-side critical section nesting is tracked in lower-order bits
> and grace-period phase number use a single high-order bit
> 

Merged, thanks!

Mathieu

> Signed-off-by: Li-Kuan Ou <k777k777tw at gmail.com>
> ---
>   include/urcu/static/urcu-bp.h     | 6 +++---
>   include/urcu/static/urcu-mb.h     | 6 +++---
>   include/urcu/static/urcu-memb.h   | 6 +++---
>   include/urcu/static/urcu-signal.h | 6 +++---
>   4 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/include/urcu/static/urcu-bp.h b/include/urcu/static/urcu-bp.h
> index 8ba3830..b163a90 100644
> --- a/include/urcu/static/urcu-bp.h
> +++ b/include/urcu/static/urcu-bp.h
> @@ -137,9 +137,9 @@ static inline enum urcu_bp_state urcu_bp_reader_state(unsigned long *ctr)
>   
>   /*
>    * Helper for _urcu_bp_read_lock().  The format of urcu_bp_gp.ctr (as well as
> - * the per-thread rcu_reader.ctr) has the upper bits containing a count of
> - * _urcu_bp_read_lock() nesting, and a lower-order bit that contains either zero
> - * or URCU_BP_GP_CTR_PHASE.  The smp_mb_slave() ensures that the accesses in
> + * the per-thread rcu_reader.ctr) has the lower-order bits containing a count of
> + * _urcu_bp_read_lock() nesting, and a single high-order URCU_BP_GP_CTR_PHASE bit
> + * that contains either zero or one.  The smp_mb_slave() ensures that the accesses in
>    * _urcu_bp_read_lock() happen before the subsequent read-side critical section.
>    */
>   static inline void _urcu_bp_read_lock_update(unsigned long tmp)
> diff --git a/include/urcu/static/urcu-mb.h b/include/urcu/static/urcu-mb.h
> index b97e42a..253d29b 100644
> --- a/include/urcu/static/urcu-mb.h
> +++ b/include/urcu/static/urcu-mb.h
> @@ -63,9 +63,9 @@ extern DECLARE_URCU_TLS(struct urcu_reader, urcu_mb_reader);
>   
>   /*
>    * Helper for _urcu_mb_read_lock().  The format of urcu_mb_gp.ctr (as well as
> - * the per-thread rcu_reader.ctr) has the upper bits containing a count of
> - * _urcu_mb_read_lock() nesting, and a lower-order bit that contains either zero
> - * or URCU_GP_CTR_PHASE.  The cmm_smp_mb() ensures that the accesses in
> + * the per-thread rcu_reader.ctr) has the lower-order bits containing a count of
> + * _urcu_mb_read_lock() nesting, and a single high-order URCU_BP_GP_CTR_PHASE bit
> + * that contains either zero or one.  The cmm_smp_mb() ensures that the accesses in
>    * _urcu_mb_read_lock() happen before the subsequent read-side critical section.
>    */
>   static inline void _urcu_mb_read_lock_update(unsigned long tmp)
> diff --git a/include/urcu/static/urcu-memb.h b/include/urcu/static/urcu-memb.h
> index c8d102f..f64cb57 100644
> --- a/include/urcu/static/urcu-memb.h
> +++ b/include/urcu/static/urcu-memb.h
> @@ -86,9 +86,9 @@ extern DECLARE_URCU_TLS(struct urcu_reader, urcu_memb_reader);
>   
>   /*
>    * Helper for _rcu_read_lock().  The format of urcu_memb_gp.ctr (as well as
> - * the per-thread rcu_reader.ctr) has the upper bits containing a count of
> - * _rcu_read_lock() nesting, and a lower-order bit that contains either zero
> - * or URCU_GP_CTR_PHASE.  The smp_mb_slave() ensures that the accesses in
> + * the per-thread rcu_reader.ctr) has the lower-order bits containing a count of
> + * _rcu_read_lock() nesting, and a single high-order URCU_BP_GP_CTR_PHASE bit
> + * that contains either zero or one.  The smp_mb_slave() ensures that the accesses in
>    * _rcu_read_lock() happen before the subsequent read-side critical section.
>    */
>   static inline void _urcu_memb_read_lock_update(unsigned long tmp)
> diff --git a/include/urcu/static/urcu-signal.h b/include/urcu/static/urcu-signal.h
> index c7577d3..707eaf8 100644
> --- a/include/urcu/static/urcu-signal.h
> +++ b/include/urcu/static/urcu-signal.h
> @@ -64,9 +64,9 @@ extern DECLARE_URCU_TLS(struct urcu_reader, urcu_signal_reader);
>   
>   /*
>    * Helper for _rcu_read_lock().  The format of urcu_signal_gp.ctr (as well as
> - * the per-thread rcu_reader.ctr) has the upper bits containing a count of
> - * _rcu_read_lock() nesting, and a lower-order bit that contains either zero
> - * or URCU_GP_CTR_PHASE.  The cmm_barrier() ensures that the accesses in
> + * the per-thread rcu_reader.ctr) has the lower-order bits containing a count of
> + * _rcu_read_lock() nesting, and a single high-order URCU_BP_GP_CTR_PHASE bit
> + * that contains either zero or one.  The cmm_barrier() ensures that the accesses in
>    * _rcu_read_lock() happen before the subsequent read-side critical section.
>    */
>   static inline void _urcu_signal_read_lock_update(unsigned long tmp)

-- 
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com