[ltt-dev] [RFC PATCH 0/7] priority-boost urcu

[Paolo Bonzini]

On 08/20/2011 02:43 PM, Mathieu Desnoyers wrote:
> Hrm, beware though that the QSBR flavor has one major difference from
> the others: in 64-bit, it represents the G.P. as a 64-bit counter
> (rather than as a 1-bit latch), and can afford to do only one
> increment/waiting "phase" rather than two, because it assumes overflow
> can never happen on 64-bit.
>
> We cannot use this technique with other URCU flavors because we need to
> reserve bits to keep track of the nesting count within the reader
> threads in the same atomically accessible integer, so we don't have a
> full 64-bit atomically writeable G.P. snapshot value available in the
> reader threads.

Yes, I'm aware of that.  I had two alternative plans about it:

1) the QSBR files do have the code for the non-QSBR variant (for 
32-bit); pick one or the other based on the number of counter bits, 
rather than based on the word size.

2) do we need 2^32 nesting?  If the max. nesting count can be changed to 
2^8 or 2^16, non-QSBR flavors can start using the counter approach on 
64-bit too.

Paolo