[ltt-dev] [PATCH] fix the "unknown" case

Ulrich Weigand Ulrich.Weigand at de.ibm.com
Tue Jun 15 08:35:16 EDT 2010


"Paul E. McKenney" <paulmck at linux.vnet.ibm.com> wrote on 06/15/2010
12:06:00 AM:

> When I use __sync_synchronize(), I get failures from the
rcutorture_urcu_mb
> stress test.  When I use a "dmb" instruction, I don't get any failures.
>
> No idea why, to be honest.

If you get the code as below for __sync_synchronize, that's no wonder: this
code is a plain compiler optimization barrier, it does not have any
hardware
memory barrier at all ...

> int
> f()
> {
>    __sync_synchronize();
> }
[snip]
>    str   fp, [sp, #-4]!
>    add   fp, sp, #0
>    add   sp, fp, #0
>    ldmfd   sp!, {fp}
>    bx   lr

No hardware barrier instruction ...

> (insn 5 4 14 3 sync_sync.c:4 (parallel [
>             (asm_operands/v ("") ("") 0 []
>                  [] 477)
>             (clobber (mem:BLK (scratch) [0 A8]))
>         ]) -1 (nil))

... as this is just a optimization barrier here.

Looking at the compiler sources, the __sync_synchronize call gets
translated into:

a. a hardware memory barrier instruction if provided by the platform
b. otherwise, a call to a __sync_synchronize libgcc routine if provided
   by the platform
c. otherwise, just a compiler optimization barrier

On ARM (at least on GCC mainline), there is no memory barrier hardware
instruction defined in the backend, so you'll never get a.

There *is* support for b., i.e. a call to a library func, but only if
you're using a quite recent compiler.  Support was added to mainline
on 2009-08-12; the first official GCC release to contain the change
is 4.5.0; the change was later backported to 4.4.3.  (As you seem to
be using 4.4.1, this feature is probably just not there yet.)

See also the discussion in this bugzilla and the mailing list threads
linked from it:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42263


Mit freundlichen Gruessen / Best Regards

Ulrich Weigand

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