[ltt-dev] Test module : benchmarking read-side locking speed

Steve Langstaff steve.langstaff at pebblebay.com
Tue May 26 09:30:00 EDT 2009


> From: Mathieu Desnoyers [mailto:compudj at krystal.dyndns.org]
> Sent: 22 May 2009 16:02
> To: Steve Langstaff
> Cc: 'David Miller'; paulmck at linux.vnet.ibm.com; mingo at elte.hu;
> jwboyer at linux.vnet.ibm.com; linux-kernel at vger.kernel.org; ltt-
> dev at lists.casi.polymtl.ca; 'Subrata Modak'; 'Alan D. Brunelle'; 'Andika
> Triwidada'
> Subject: Re: [ltt-dev] Test module : benchmarking read-side locking
> speed
> 
> * Steve Langstaff (steve.langstaff at pebblebay.com) wrote:
> > > From: Mathieu Desnoyers [mailto:compudj at krystal.dyndns.org]
> > > Sent: 21 May 2009 20:12
> >
> >
> > > I am trying to complete my numbers for performance impact of read-
> side
> > > locking primitives (on the fast path) for various architectures.
> >
> > > Help with testing on a larger set of architectures would be more
> than
> > > welcome. Note that this module requires the kernel to be configured
> > > with
> > > CONFIG_PREEMPT=y. Some config option sanity checking is done at
> > > compile-time. Other requirement : disable invasive lockdep-style
> > > instrumentation.
> >
> > Another requirement is that get_cycles() needs to return something
> > meaningful :)
> >
> 
> For ARMv7 Omap3, I have the following version (I've been able to get
> benchmarks with it yesterday). It requires LTTng to be started for the
> trace clock infrastructure to be in place and running to provide a full
> 64-bits emulated TSC.

Using your updated test source, I get slightly different results on my
PXA255 (total time = 1 rather than 0), but I'm not convinced that the
measurements are correct...

/lib/modules/2.6.29.2 # insmod ./ltt_test.ko
[   81.372318] test init
[   81.374647] Number of active CPUs : 1
[   81.378806] test results: time for baseline
[   81.383010] number of loops: 20000
[   81.386510] total time: 1
[   81.389147] -> baseline takes 0 cycles
[   81.392910] test end
[   81.396017] test results: time for spinlock
[   81.400292] number of loops: 20000
[   81.403711] total time: 1
[   81.406417] -> spinlock takes 0 cycles
[   81.410184] test end
[   81.413293] test results: time for read rwlock
[   81.417825] number of loops: 20000
[   81.421248] total time: 1
[   81.423887] -> read rwlock takes 0 cycles
[   81.427990] test end
[   81.430844] test results: time for seqlock
[   81.434962] number of loops: 20000
[   81.438439] total time: 1
[   81.441075] -> seqlock takes 0 cycles
[   81.444751] test end
[   81.447871] test results: time for preempt disable/enable pairs
[   81.453818] number of loops: 20000
[   81.457300] total time: 1
[   81.459940] -> preempt disable/enable pair takes 0 cycles
[   81.465359] test end
insmod: cannot insert './ltt_test.ko': Resource temporarily unavailable
(-1): Resource temporarily unavailable






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