[ltt-dev] [UST PATCH] Generic fls()

[Mathieu Desnoyers]

Merge identical x86 32/64 fls() code, move ppc code closer to other fls and
implement an architecture-agnostic fls() fallback. This last function is a
rewrite from the Linux generic fls() function. The code ends up being quite
similar because this function is trivial.

Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers at efficios.com>
---
 include/ust/processor.h |   80 ++++++++++++++++++++++++++++++++----------------
 1 file changed, 54 insertions(+), 26 deletions(-)

Index: ust/include/ust/processor.h
===================================================================
--- ust.orig/include/ust/processor.h
+++ ust/include/ust/processor.h
@@ -27,6 +27,60 @@ extern volatile __thread long *ust_reg_s
 
 #define ____cacheline_aligned __attribute__((aligned(CACHE_LINE_SIZE)))
 
+#if defined(__i386) || defined(__x86_64)
+
+static inline int fls(unsigned int x)
+{
+        int r;
+        asm("bsrl %1,%0\n\t"
+            "cmovzl %2,%0"
+            : "=&r" (r) : "rm" (x), "rm" (-1));
+        return r + 1;
+}
+
+#elif defined(__PPC__)
+
+static inline int fls(unsigned int x)
+{
+        int lz;
+
+        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
+        return 32 - lz;
+}
+
+#else
+
+static inline int fls(unsigned int x)
+{
+	int r = 32;
+
+	if (!x)
+		return 0;
+	if (!(x & 0xFFFF0000U)) {
+		x <<= 16;
+		r -= 16;
+	}
+	if (!(x & 0xFF000000U)) {
+		x <<= 8;
+		r -= 8;
+	}
+	if (!(x & 0xF0000000U)) {
+		x <<= 4;
+		r -= 4;
+	}
+	if (!(x & 0xC0000000U)) {
+		x <<= 2;
+		r -= 2;
+	}
+	if (!(x & 0x80000000U)) {
+		x <<= 1;
+		r -= 1;
+	}
+	return r;
+}
+
+#endif
+
 #ifdef __i386
 
 struct registers {
@@ -43,15 +97,6 @@ struct registers {
 	long esp;
 };
 
-static inline int fls(int x)
-{
-        int r;
-        asm("bsrl %1,%0\n\t"
-            "cmovzl %2,%0"
-            : "=&r" (r) : "rm" (x), "rm" (-1));
-        return r + 1;
-}
-
 #ifdef CONFIG_UST_GDB_INTEGRATION
 
 /* save_registers - saves most of the processor's registers so
@@ -241,15 +286,6 @@ struct registers {
 	unsigned long rsp;
 };
 
-static inline int fls(int x)
-{
-        int r;
-        asm("bsrl %1,%0\n\t"
-            "cmovzl %2,%0"
-            : "=&r" (r) : "rm" (x), "rm" (-1));
-        return r + 1;
-}
-
 #ifdef CONFIG_UST_GDB_INTEGRATION
 
 #define save_registers(regsptr) \
@@ -432,14 +468,6 @@ static inline int fls(int x)
 struct registers {
 };
 
-static __inline__ int fls(unsigned int x)
-{
-        int lz;
-
-        asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
-        return 32 - lz;
-}
-
 #define ARCH_COPY_ADDR(dst) \
 		     "lis " dst ",2b at h\n\t" /* load high bytes */ \
 		     "ori " dst "," dst ",2b at l\n\t" /* load low bytes */

-- 
Mathieu Desnoyers
Operating System Efficiency R&D Consultant
EfficiOS Inc.
http://www.efficios.com